AI Hardware Forum 2023

  • Yorktown Heights, NY, USA
This event has ended.

About

The fast adoption of Generative AI and Foundation Models is transforming how we compute at scale, and requires bold innovations in hardware and software infrastructure. Continuing to rely on conventional approaches is simply not sustainable and limits accessibility to the technology.

If you are interested in learning more about this invite-only event, please reach us at ibmaihw@us.ibm.com.

Why attend

We will come together to discuss what's next in foundation models and the challenges in designing AI hardware to support complex and multi-modal workloads. There will be presentations from industry leaders, a special panel session, interactive demos by IBM experts, and a poster session showcasing research from leading universities.

Speakers

SH
Steven Huels

Steven Huels

General Manager, Artificial Intelligence
Red Hat
MB
Matt Baker

Matt Baker

Senior Vice President, Artificial Intelligence Strategy
Dell Technologies
RS
Raja Swaminathan

Raja Swaminathan

Corporate Vice President, Packaging
AMD
JB
Jeffery Burns

Jeffery Burns

Director, AI Compute
IBM Research
SC
Soumith Chintala

Soumith Chintala

Vice President, AI Research
Meta

Agenda

  • Registration open at 9:00am. Light breakfast and coffee will be provided.

    • Welcome remarks – Mukesh Khare (IBM)
    • Realizing Value out of AI/ML – Steven Huels (Red Hat)
    • Infrastructure and solutions considerations in a dynamic AI landscape – Matt Baker (DELL)
    • Heterogeneous Integration enabled by Advanced packaging empowering next generation AI architectures – Raja Swaminathan (AMD)
    SH
    Steven Huels
    Steven Huels
    General Manager, Artificial Intelligence
    Red Hat
    MB
    Matt Baker
    Matt Baker
    Senior Vice President, Artificial Intelligence Strategy
    Dell Technologies
    RS
    Raja Swaminathan
    Raja Swaminathan
    Corporate Vice President, Packaging
    AMD
  • A sit-down lunch will be provided for all guests.

  • Announcements:

    • Jeff Burns (IBM) 

    Plenary Talks:

    • Enabling a Flexible AI Infrastructure with PyTorch – Soumith Chintala (Meta) and Priya Nagpurkar (IBM)
    • Semiconductor Technology Platforms for AI Scaling – Yasumitsu Orii (Rapidus) and Hemanth Jagannathan (IBM)
    • Analog In-Memory Computing with Phase Change and Flash Memories – KC Wang (Macronix) and Vijay Narayanan (IBM) 
    JB
    Jeffery Burns
    Jeffery Burns
    Director, AI Compute
    IBM Research
    SC
    Soumith Chintala
    Soumith Chintala
    Vice President, AI Research
    Meta
    PN
    Priya Nagpurkar
    Priya Nagpurkar
    Vice President, Hybrid Cloud Platform and Developer Productivity, IBM Research
    IBM Research
    YO
    Yasumitsu Orii
    Yasumitsu Orii
    Senior Managing Executive Officer, 3D Assembly Division
    Rapidus
    HJ
    Hemanth Jagannathan
    Distinguished Engineer, Chiplet and Advanced Packaging Technology & Quantum 300mm Scale-out
    IBM Research
    KW
    KC Wang
    KC Wang
    Chief Scientist
    Macronix
  • AI, semiconductors, and the role of government:

    • Host: 
      • Ashish Nadkarni (IDC)
    • Panelists:
      • Shadi Shahedipour-Sandvik (New York State University System; SUNY)
      • Kazumi Nishikawa (Japan Ministry of Economy, Trade, and Industry; METI)
      • Carlo Reita (France Energy Agency Technology Research Institute; CEA-Leti)
      • Manuel Xavier Lugo (US Department of Defense; DoD)
      • Albert Heuberger (Germany Fraunhofer Institute for Integrated Circuits, IIS)
    AN
    Ashish Nadkarni
    Ashish Nadkarni
    Group Vice President and General Manager, Infrastructure Systems, Platforms and Technologies and BuyerView Research
    IDC
    SS
    Shadi Shahedipour-Sandvik
    Shadi Shahedipour-Sandvik
    Senior Vice President for Research
    SUNY
    KN
    Kazumi Nishikawa
    Kazumi Nishikawa
    Principal Director, Commerce and Information Policy Bureau
    METI – Japan Ministry Economy, Trade, and Industry
    CR
    Carlo Reita
    Carlo Reita
    Director, Strategic Partnerships and Planning
    CEA-Leti
    CU
    Capt. Manuel Xavier Lugo, USN
    Capt. Manuel Xavier Lugo, USN
    Head of AI Programs
    OSD Chief Digital and Artificial Intelligence Office, DoD
    PH
    Prof. Albert Heuberger
    Prof. Albert Heuberger
    Executive Director
    Fraunhofer Institute for Integrated Circuits
  • Drinks and light bites will be provided

    IBM Live Demos:

    • Efficient Inference on the IBM AIU Accelerator 
    • On-chip Analog In-Memory Compute

    Academic Posters:

    • Digital Architecture
      • ​​​​​​​​​​​​​​​​​​​​​Columbia: iMCU: A Digital In-Memory Computing-based Microcontroller Unit for TinyML
      • RPI: EVA: Efficient Vector Architecture for Dynamic Structured Sparsity in Transformer Processing
    • Algorithm Optimization
      • RPI: Coarser-grained Structured Pruning: Pruning of Experts in the Mixture-of-Experts (MoE) based DNN Architectures with Theoretical Performance Guarantee
      • MIT: PockEngine: Sparse and Efficient Fine-tuning in a Pocket
      • MIT: SmoothQuant: Accurate and Efficient Post-Training Quantization for Large Language Models
      • MIT: Efficient Spatially Sparse Inference for Conditional GANs and Diffusion Models
      • MIT: On-Device Training Under 256KB Memory
      • MIT: MCUNet: Tiny Deep Learning on IoT Devices
    • Packaging
      • SUNY Binghamtom: Investigate electromigration (EM) behavior of micro bump
      • SUNY Binghamtom: A Microstructural Investigation of Sub-10 um Pitch Copper Contact Structures and Bonded Copper in Hybrid Bonding
    • In-Memory Compute
      • GA Tech: Tunable Non-volatile Gate-to-Source/Drain Capacitance of FeFET for Capacitive Synapse
      • MIT: Protonic non-volatile programmable resistors for analog neural networks
      • MIT: Simulation of analog neural networks based on protonic non-volatile programmable resistors using IBM AI HW Kit
      • MIT: Thickness limits of electrolyte and channel layers in protonic ECRAMs
      • U Albany: Influence of processing conditions on tantalum oxide resistive random access memory (ReRAM) performance
      • U Albany: Experimental analysis of multilevel programming of 1T1R ReRAM crossbar arrays based in-memory computing using a microcontroller-based hardware platform
      • U Albany: Analog NVM Synapse for Hardware-Aware Neural Network Training Optimization on Hybrid 65nm CMOS / TaOx ReRAM Devices
      • U Albany: Reduced switching energy in bilayer Sb/AlSb PCM heterostructure cell
      • U Albany: Crystallization template for Sb-rich (A7) PCM phase
      • RPI: Complex Synapse: Design and Fabrication

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