A Gate-Quality Dielectric System for Sige Metal-Oxide-Semiconductor Devices

Abstract

The use of Si1-xGex alloys for p-channel high-transconductance MOSFET's requires a high-quality dielectric system. Direct oxidation of Si1-xGex alloys or even low-temperature deposition of SiO2 directly on Si1-xGex results in a very high interface state density. We show that the use of a thin (6-8 nm) Si cap layer grown epitaxially on the Si1-xGex layer with the subsequent plasma-enhanced chemical vapor deposition of silicon dioxide gives low (below 1011 eV-1 – cm-2) interface state density. The Si cap layer leads to a sequential turn-on of the Si1-xGex channel and the Si cap channel, as clearly observed in the low-temperature CV curves. We show that this dual-channel structure can be designed to suppress the parasitic Si cap channel. The MOS capacitors are also used to extract valence-band offsets. © 1991 IEEE