A low voltage SANOS nonvolatile semiconductor Memory (NVSM) device

Abstract

SONOS/MONOS devices have attracted much attention in the semiconductor industry due to their advantages over traditional floating gate EEPROM devices, including lower programming voltage, better scalability, improved endurance and a simple fabrication process compatible with standard CMOS technology. However, these devices still face challenges in future high density NVSMs, which require low voltage (< 5V), low power programming with long-term retention (> 10 years at 85 C) and endurance (> 10 6 write/erase cycles) performance (White et al., 2000). In this work, we use a high-k material, Al 2 O 3 (K f =9) to replace SiO 2 as the top blocking layer of the SONOS device and study the erase/write speed and data retention characteristics of the new SANOS device.