A New Framework of Design Rules for Compaction of VLSI Layouts

Abstract

In recent years, IC layout compactors seem still confined to the use of simple spacing rules, while industrial processes for mask fabrication continue to use complex design rules. The simplicity in rules makes the construction of a fast compactor easier, but also limits its usefulness in the real design application. Furthermore, it seems inevitable to have shape objects in a layout system, and mixing them into a symbolic layout design requires the use of the full set of mask-level design rules. In this paper, we present a uniform framework to describe design rules, develop an efficient compaction scheme to incorporate shapes objects and these more complex rules, and study some consistency requirements on the system of design rules. The design rules covered include size rules, overlap rules, extension rules, three types of conditional rules (topology rules, width rules, length rules), maximum rules, and nonpositive rules, in addition to the usual simple minimum space rules. A compactor with such capability has been constructed, and proves to be useful in the environment of complex fabrication processes. © 1988 IEEE