Abstract
As CMOS devices scale into the nanometer regime, the material set and device structures employed by conventional FET are beginning to reach their limits. In this paper, device and technology features of CMOS at the nanometer regime are examined. This includes new devices formed by different device structures such as the double-gate FET and back-gate FET, as well as devices made of new materials such as silicon germanium and combinations of new materials such as high-dielectric constant gate dielectrics and metal gate electrodes.