Cryogenic Electronics for Quantum Computing: From Materials to Devices

Abstract

The impact of an advanced quantum computing technology on society will be transformative [1]. To realize such a quantum technology, the entire quantum system must evolve, from the qubit chip to the supporting readout and control electronics [2]. Integration of cryogenic electronics inside the cryostat may become necessary to reduce system cost, increase speed and improve the input-output bottleneck [3]. Significant efforts have already been made to develop cryogenic integrated circuits for the generation of qubit control signals inside the cryostat. One of the main design constraints of such circuits and their subsequent integration is the low available cooling power, which is in the order of a few W at the 3 K stage, and significantly less at the lower stages. Advanced cryo-circuits demonstrated today show power dissipation in the order of 5 mW/qubit [4]. This means that even with such solutions, scalability will remain challenging for advanced quantum computers. An approach to address this power challenge is to develop not only tailored cryogenic circuits, but also tailored cryogenic devices that can leverage the unique and beneficial properties of materials at low temperatures. In this work, we will demonstrate the design and operation of a cryogenic qubit control circuit, an RF arbitrary waveform generator, based on commercial 14 nm FinFET technology. The circuit exhibits exceptionally low power dissipation and excellent noise performance. To plot a path towards even further reduce power dissipation, we study and model the comprising transistor technology at 4 K. The results indicate that a tailored cryogenic CMOS technology, leveraging the reduced subthreshold swing and enhanced mobility of the transistors, could achieve orders of magnitude reduction of DC power dissipation. Finally, we demonstrate cryogenic circuits based on III-V materials, such as InGaAs and InP, and show how these leverage the extremely high electron mobility of cryogenic quantum wells towards even further enhanced circuit performance. [1] T. D. Ladd et al., Nature, vol. 464, no. 7285, pp. 45–53, Mar. 2010. [2] L. M. K. Vandersypen et al., Npj Quantum Inf., vol. 3, no. 1, p. 34, 2017. [3] B. Patra et al., IEEE J. Solid-State Circuits, vol. 53(1), pp. 309–321, 2018. [4] J. C. Bardin et al., Dig. Tech. Pap. - IEEE Int. SSCC., pp. 456–458, 2019.