Effect of embedded-sige eSiGeon ESD TLP and VFTLP characteristics of diode-triggered silicon controlled rectifiers DTSCRs

Abstract

Effect of embedded-SiGe eSiGein anode regions of DTSCRs during TLP and VFTLP testing is investigated. 100ns TLP results of DTSCRs with eSiGe show lower parasitic PNP beta, higher trigger voltage, higher holding voltage and premature snapback failure. Turn-on time measured during VFTLP testing is shown not to be affected by eSiGe due to the breakdown of SCR NW to PW/substrate junction during the initial overshoot.