Engineering band-edge high-κ/metal gate n-MOSFETs with cap layers containing group IIA and IIIB elements by atomic layer deposition

Abstract

This paper presents studies performed in engineering high-κ metal gate stacks by using capping layers containing Group IIA and IIIB elements. Both high-K gate dielectric (HfO2) and capping materials, namely, the oxides of barium, lanthanum and yttrium are deposited by atomic layer deposition (ALD) to offer superior process control and flexibility. Position specific insertion of cap layers into the gate stack is studied and the device tradeoffs are highlighted. The magnitude of threshold voltage shift is correlated to the electronegativity of the cap layer species and its relative position in the gate stack. For a given cap position, BaO provides the maximum threshold voltage shift with the highest penalty in carrier mobility, followed by La 2O3 and Y2O3 caps. Both lanthanum and barium incorporation into the high-K gate stack provides a T invscaling benefit. Ozone based ALD processes are shown to adversely impact Tinv scaling due to the re-growth of the interface layer between the high-κ and the silicon substrate. This penalty is exacerbated in gate stacks with cap layers situated directly below the high-κ film. Significant improvements in Tinv scaling are obtained by migrating to a water based ALD process.