EUV processing and characterization for BEOL

Abstract

The successful demonstration of 637 wafer exposures in 24 hours on the EUV scanner at the IBM EUV Center for Excellence in July marked the transition from research to process development using EUV lithography. Early process development on a new tool involves significant characterization, as it is necessary to benchmark tool performance and process capability. This work highlights some key learning from early EUV process development with a focus on identifying the largest sources of variability for trench and via hole patterning through the patterning process. The EUV scanner demonstrated stable overlay on a 40 lot test run using integrated wafers. The within field and local critical dimension uniformity (CDU) are the largest contributors to CD variations. The line edge roughness (LER) and line width roughness (LWR) in EUV resist will be compared to the post etch value to determine the effect of processing. While these numbers are generally used to describe the robustness of 1D trenches or circular vias, the need to accurately evaluate the printability of irregular 2D features has become increasingly important. In the past 5 years, models built from critical dimension scanning electron microscope (CDSEM) contours has become a hot topic in computational lithography. Applying this methodology, the CDSEM contour technique will be used to assess the uniformity of these irregular patterns in EUV resist and after etching. CDSEM contours also have additional benefits for via pattern characterization.