High speed test structures for in-line process monitoring and model calibration

Abstract

The use of in-line test structures for routinely monitoring various high frequency aspects of the performance of CMOS gates is described. These compact test structures use de I/O' s and are compatible with standard parametric testers. The specific examples described are ring oscillators for a wide range of self-consistent parameter extraction ranging from circuit delays to gate length and leakage components; and a new class of self-timed/ calibrated structure of which a circuit for measuring SOI switching history effects utilizing 100ps time-scale, self-generated pulses is presented as a representative example. ©2005 IEEE.