Interconnect and substrate modeling and analysis: An overview

Abstract

Accurate models for on-chip metal interconnect, silicon substrate, and packaging have become necessary for accurate simulation of high-performance ULSI circuits and high-speed RF designs. An overview of the hierarchy of techniques used to model and simulate these structures is given. While not an exhaustive summary, the purpose of the paper is to give the designer fundamental and practical understanding of principles used in modeling and analysis. The range of techniques from three-dimensional (3-D) modeling to quasi-3-D to transmission lines are analyzed, and their importance and impact are described. A modeling strategy that can include various kinds of modeling techniques and nonlinear devices in one simulation is also described.