ISPD 2006 placement contest: Benchmark suite and results

Abstract

This talk introduces the new suite of ISPD 2006 placement benchmarks. These circuits are all directly derived from real industrial ASIC designs and represent today's mixed-size physical design constraints in terms of size and complexity. Compared to ISPD 2005 placement benchmarks, ISPD 2006 suite has more movable macros and the wider range of design utilizations. The ISPD 2006 Placement Contest is being held with these new benchmarks. This year, a more sophisticated scoring function will be deployed to measure the quality of placement solutions. The metric function takes into account HPWL (half-perimeter-bounding-boxwirelength), runtime and density target constraints. The purpose of adding runtime to the scoring function is to gently encourage faster placement performance. The purpose of the density target constraint is to encourage more routable placements. Further, this also allows more space for buffering, gate sizing and other synthesis transformations that might happen after the placement. Thus, this year's contest forces the placers to become more realistic than last year's, which focused solely on wirelength minimization. A total ten academic placement tools participated in the contest and the final results will be announced during this talk.