Low power cryogenic RF ASICs for quantum computing

Abstract

In this work, we describe the potential for using deep sub-micron CMOS integrated circuits in the control of superconducting transmon qubits for quantum computing and elaborate on a specific example, namely our exploratory cryoCMOS qubit state controller (QSC) chip. Details of the design are discussed, especially those relating to design for cryogenic operation. Finally, we summarize our characterization of this chip at 5K and demonstrate successful qubit manipulations using it, including RB experiments in which the QSC achieve qubit control with less than 8x10-4 error rate per Clifford gate.