Modelling cache pollution

Abstract

Cache memories are commonly used to reduce the cost of accessing data and instructions in memory. Misses in the cache can severely reduce system performance. It is therefore beneficial to try to anticipate cache misses in an attempt to reduce their frequency. Prefetching can be used to prime a cache with the addresses that will most probably be needed in the future. One side-effect of prefetching is that cache lines that would had been used in the future will be supplanted by prefetched data and instructions that may never be used. This is known as cache pollution. We model this effect using trace-driven cache simulation, and propose a new mechanism called the Prefetch Buffer Filter (PBF) that, combined with tagged prefetching, significantly reduces the cache pollution while also reducing the number of memory references issued for prefetching. Through the use of traced-driven simulation we demonstrate that using a 16-entry PBF for both the instruction and the data stream can consistently reduce data cache miss rates while effectively reducing memory traffic.