New serial link simulation process, 6 Gbps SAS case study

Abstract

This case study details a pre-hardware serial link simulation process developed for 6+ Gbps link designs. Industry standards such as Serial-Attached SCSI (SAS) now require simulation to verify compliance since recovered link signals are only visible after equalization deep inside silicon. First-generation AMI models are used to simulate this equalization and quantify performance at le15 bits while comprehending a variety of jitter sources. Techniques for specification compliance testing are illustrated, some of which previously could only be performed with physical hardware. Design margins are quantified against a range of system configurations including PCB trace length, connector, and cabling options.