Outlook and opportunities for hetero-epitaxy in SI CMOS technology and beyond

Abstract

An overview of promising applications of Si/SiGe hetero-epitaxy for mainstream CMOS technology is presented. First, near-term applications of SiGe hetero-epitaxy, such as raised SiGe source-drain contacts, are reviewed. Next, the application of hetero-epitaxy to strained Si CMOS is reviewed, including a discussion of devices that utilize both global and local strain. Quantum well heterostructure devices such as buried-channel MOSFETs and MODFETs are also reviewed. Finally, novel hetero-epitaxial devices that could be enabled by the widespread availability of hetero-epitaxy in CMOS technology are described.