Performance projection and thermal management of high performance VLSI designs

Abstract

The impact of chip self-heating induced temperature non-uniformity within the VLSI chip and its influence on the performance of the designs are described in this paper. To accurately model chip performance, both electrical and thermal analysis including chip packaging should be examined together. This paper describes a methodology that allows more accurate temperature calculation of the chip based on circuit power analysis, together with thermal analysis that studies the on chip temperature distribution in order to improve the accuracy of existing methods to account for on chip temperature gradients and perform an overall performance prediction and adjustment. A computational fluid dynamics analysis is used in this study to address non-uniform power distribution temperature calculation for high power integrated circuits. Examples are given and results discussed with highlighted conclusions.