PROTOTYPING EXPERIMENTAL PAGING ALGORITHMS1

Abstract

This paper discusses a series of changes made to a Virtual Machine/System Product system with the High Performance Option. The changes centered around the paging subsystem. The motivation and the background for these paging enhancements are discussed. The design of a series of experimental paging subsystems is described and contrasted with the old design. Specifically, the new algorithms for main memory management, block paging, working set identification, trimming, pre-paging, page replacement, page out device selection, page out slot selection are discussed and evaluated. The performance impact of these changes is illustrated by results of benchmark measurements on 4341-2 and 3081D computers in a CMS interactive environment. These results are contrasted by measurements without the enhancements. The paper closes by discussing some of the the things learned in running the prototype and draws appropriate conclusions.