Redesign modern IP router chips in a 3D technology

Abstract

The paper discusses the 3D integration of router chips and proposes a 3D architecture of router system. We analyze the bottlenecks of modern router, the advantages of 3D stack and show the potential benefit of applying 3D stack on router chips. By careful architecture level and circuit level optimization, we indicate the router system can be improved greatly with 3D technologies. The key contribution of the paper is to provide a reference for network hardware designer in future works. © 2012 IEEE.