Review of computational lithography modeling: Focusing on extending optical lithography and design-technology co-optimization

Abstract

Advances in computational lithography over the last 10 years have been instrumental to the continued scaling of semiconductor devices. Competitive scaling requires two types of complementary models: fast predictive empirical models that can be used for pattern correction and verification; rigorous physical models that can be used to identify key physical effects that must be considered to ensure pattern fidelity, but are too resource intensive to use for full chip applications. Today, all computational lithography efforts such as the optical proximity correction (OPC) and the optical rules check (ORC) depend on the ability to predictively model the lithography and metrology processes. We discuss some of the current modeling practices in optics, mask, resist and etching, leading to the " Holy Grail " of predictively modeling entire patterning process which we call " virtual fab " . Extreme ultraviolet (EUV) modeling is discussed due to its potential to extend optical lithography scaling for future nodes. Modeling of novel technologies such as Diblock Copolymer patterning is also discussed to demonstrate new opportunities for continued scaling. Complexity of the " virtual fab " approach is extremely high as there are multiple dimensions in this approach. The need to overcome this complexity, by reducing the number of dimensions of the problem, is evident. Lastly, the ability to leverage lithography modeling in design co-optimization is an important element of semiconductor device scaling.