Scaling opportunities for Gate-All-Around: A patterning perspective

Abstract

Gate all around (GAA) nanosheet FET's have emerged as the next technology to FinFET's for beyond 3nm node. EUV (extreme ultraviolet) lithography has been used extensively since the 7nm node for interconnect patterning. Here, we discuss how EUV lithography in the front end of line can uniquely enable GAA cell scaling. We demonstrate novel avenues for stochastics mitigation to extend single-expose 0.33NA EUV and simplify mask assembly. We discuss the emergence of High Numerical Aperture (NA=0.55) EUV and propose insertion points into GAA process flow and review unique patterning needs to enable high-NA EUV.