Self-consistent and efficient electro-thermal analysis for poly/metal gate FinFETs

Abstract

A self-consistent and efficient computational 3-D modeling methodology for analyzing thermal and electrical transport in nano-scale devices is developed. The methodology is applied for the first time to multi-finger DG-FinFETs to compute the device characteristics, spatial power distribution, and spatial temperature distribution using the experimentally extracted thermal conductivity of confined thin Si layer. The effect of device dimensions on temperature rise and device performance for poly-gate and metal-gate devices is investigated. Results show some favorable aspects of mid-gap metal-gate device over the band-edge metal-gate device and poly-gate device from both heating and device performance perspective. The mid-gap metal-gate device causes 10 % less heating in the equal performance case with respect to polygate counterpart, and offers an order of magnitude lower leakage power for the equal on-current case with respect to band-edge metal-gate counterpart.