Toward perfect on-wafer pattern placement: Stitched overlay exposure tool characterization

Abstract

Continued lithographic pattern density scaling depends on aggressive overlay error reduction.1,2 Double patterning processes planned for the 22nm node require overlay tolerances below 5 nm; at which point even sub-nanometer contributions must be considered. In this paper we highlight the need to characterize and control the single-layer matching among the three pattern placement mechanisms intrinsic to step&scan exposure - optical imaging, mask-to- wafer scanning, and field-to-field stepping. Without stable and near-perfect pattern placement on each layer, nanometer-scale layer-to-layer overlay tolerance is not likely to be achieved. Our approach to understanding onwafer pattern placement is based on the well-known technique of stitched field overlay. We analyze dense sampling around the field perimeter to partition the systematic contributors to pattern placement error on representative dry and immersion exposure tools. © 2010 SPIE.