Two-Dimensional Simulation of MODFET and GaAs Gate Heterojunction FET's

Abstract

Previous simulation studies on heterojunction devices have been limited to idealized device structures (mostly 1-D) which neglect important parasitic effects. In order to realistically simulate heterojunction devices, a general two-dimensional device simulator has been developed which includes for the first time features essential to designing and modeling realistic devices, for example, multiple heterolayers, a modified mobility model for the 2-D electron gas, Fermi level pinning at the surfaces, and deep traps in the substrate. Two specific types of high electron mobility heterojunction devices have been studied and compared. The first type is the recessed-gate MODFET and the second type is the GaAs gate heterojunction FET. At 77 K, simulation results showed that high transconductances (450–500 mS/mm) can be obtained for both types of structures with similar geometries. For GaAs gate FET’s, the device operation is found to be sensitive to the surface defect density in the ungated gap of the self-aligned T-gate structure, while for a similar MODFET structure with an analogous gap between the actual recessed edge and the gate edge, the dependency on the surface defect density is relatively weak because the AlGaAs layer is rather heavily doped. The causes for the transconductance degradation of MODFET’s have been identified as either the neutralization of the ionized impurities in the AlGaAs layer or the saturated resistor under the ungated gap in the recessed region. Copyright © 1985 by The Institute of Electrical and Electronics Engineers, Inc.