Use of electron-trapping region to reduce leakage currents and improve breakdown characteristics of MOS structures

Abstract

A trapping layer of W (≈1014 atoms/cm2) has been deposited between 70 Å of thermal silicon dioxide grown from a polycrystalline silicon substrate and 520 Å of deposited pyrolytic silicon dioxide in an MOS structure to reduce high leakage currents and low-voltage breakdowns associated with asperities at the polycrystalline Si-thermal SiO 2 interface. MOS structures without the W layer but with the pyrolytic SiO2 layer were also found to be effective. This improvement is ascertained to be due to localized electron trapping in the W or pyrolytic oxide layer at low average fields which reduces the locally high fields and therefore high dark currents associated with the asperities. At higher average fields uniform trapping is believed to be dominant. This uniform effect can also enhance the breakdown characteristics if the trapped charge is not detrapped by the applied field.