PublicationIEEE T-EDPaperVA-6 Two-Dimensional Simulation of Latch-up in CMOS StructureIEEE T-EDView publicationAbstractNo abstract available.Home↳ PublicationsDate01 Jan 1982PublicationIEEE T-EDAuthorsG.J. HuM.R. PintoS. KordicIBM-affiliated at time of publicationShare
