Verisym: Verifying circuits by symbolic simulation
- William Adams
- Warren A. Hunt Jr.
- et al.
- 2003
- Formal Methods in System Design
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2 results for Warren A. Hunt Jr.
Verification of FM9801: An out-of-order microprocessor model with speculative execution, exceptions, and program-modifying capability
- Jun Sawada
- Warren A. Hunt Jr.
- 2002
- Formal Methods in System Design