Dionysios Diamantopoulos

Dionysios Diamantopoulos received the Diploma of Engineering in Computer Engineering and Informatics from the University of Patras, Greece, in 2009 and the Ph.D. degree from the National Technical University of Athens, Greece, in 2015, with a thesis, focused on rapid system prototyping and automated synthesis of many-accelerator heterogeneous SoCs, under supervision of Prof. Dimitrios Soudris. During his Ph.D. studies he was affiliated with the Institute of Communication and Computer Systems (ICCS), Greece, where he served as a researcher in several research projects from EU (FP7, H2020) and European Space Agency (ExoMARS program). After his Ph.D., he served his mandatory military service in Hellenic Army General Staff - Computer Research Department. Later, he joined a startup company, in the area of IoT/V2V/V2X communications, as an R&D engineer - SoC architect. In September 2017 he joined IBM Research - Zurich as a Post-Doc Researcher at the Heterogeneous Cognitive Computing Systems Group, conducting research in novel architectures for energy-efficient FPGA accelerators, towards HPC, Big Data, and IoT applications (project FET-H2020 Open transPREcision COMPuting). In January 2020 he joined the cloud FPGAs & Tape Group as a Post-Doc Researcher. From January 2021 he is a Recearch Staff Member in the same group.

His main research interests include Transprecision & Energy-Aware Computing, Near-Memory Computing, Deep Learning & Machine Learning, Reconfigurable Architectures, On-chip Interconnection Networks, Algorithm-Hardware Co-design, High-Level-Synthesis, and Heterogenous-Accelerated Systems for Hybrid Cloud and AI.

Awards:

• 1st IBM Plateau,  24 September 2020
• Featured Poster Award, 'ecTALK: Energy efficient coherent transprecision accelerators - The bidirectional long short-term memory neural network case', D. Diamantopoulos et al., COOL Chips 21, Japan, 2018
• 2nd Place, Cadence Inc., EMEA Contest for Automotive Embedded Systems for the paper 'HVSoCs: A Framework for Rapid Prototyping of 3-D Hybrid Virtual System-on-Chips', IPDPS'13 D. Diamantopoulos et al., Germany, 2013
• NVIDIA-sponsored Best Paper Award, Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures, Invited to Journal 'GENESIS: Parallel Application Placement onto Reconfigurable Architectures'. ACM Trans. Embedded Comput. Syst. 14(1): 18:1-18:26 (2015), D. Diamantopoulos et al., Germany, 2013