Analysis of failure mechanism on gate-silicided and gate-non-silicided, drain/source silicide-blocked ESD NMOSFETs in a 65nm bulk CMOS technology

Abstract

Electrical and SEM analysis of gate-silicided (GS) and gate-non-silicided (GNS) ESD NMOSFETs in a 65nm bulk CMOS technology show that the failure mechanism switches away from classical drain-to-source filamentation when the silicidation between the silicide-blocked drain/source and the poly silicon gate is avoided. For 2.5V thick oxide devices, drain-to-substrate junction shorting was observed, whereas, for 1.0V thin oxide devices, gate-oxide breakdown failure occurred. © 2006 IEEE.