Identification Of Perimeter Depletion And Emitter Plug Effects In Deep-Submicrometer, Shallow-Junction Polysilicon Emitter Bipolar Transistors

Abstract

Two new types of narrow-emitter effects are identified in shallow and narrow-junction polysilicon emitter bipolar transistors. These effects result from a lower doping concentration close to the emitter perimeter of large devices (perimeter depletion effect) or in very-narrow-emitter devices where the polysilicon plugs up the emitter window (emitter plug effect). The consequence is a locally shallower emitter junction which causes a reduced collector current density and a nonideal base current due to a partial overlap of the emitter-base space-charge region with the poly/monosilicon interface. The nonuniform doping in the polysilicon is verified by energy-dispersive X-ray spectroscopy (EDX) measurements. From electrical measurements, a clear indication of the emitter plug effect is given by the fact that the excess (nonideal) base current increases rapidly with the reduction of the emitter width into a regime where the emitter width becomes smaller than twice the poly thickness. These observations have been made for two different self-aligned transistor structures, and further evidence is given by a comparison of various poly emitter processes. The impact of the perimeter depletion effect on the transistor dc characteristics is explained by a model, based on a separation in an internal and a peripheral device. Perimeter depletion and emitter plug effects will have to be considered for future bipolar device scaling and might call for poly emitter processes which suppress or eliminate these narrow emitter effects. © 1992 IEEE