COST AND SPEED BARRIERS IN LSI/VLSI TESTING - CAN THEY BE OVERCOME BY TESTABILITY DESIGN? .

Abstract

To increase efficiency and reduce costs in LSI/VLSI testing, the ultimate goal will be to fully automate and remote-control the testing and diagnosis of LSI/VLSI systems and system parts. Two main barriers seem to exist: cost and speed. The author briefly reviews the evolution toward testability design, analyzes what constitutes the cost and speed barriers, indicates how they can be overcome, and considers the probable future developments in test engineering and in ATE. It is shown that the key to overcoming the barriers lies in the realization of in-system at-speed testability (ISAST) for system-parts. The essential design measures for attaining ISAST are described. The importance of providing chip-level isolation and multiple-cycle self-sufficiency for testing is emphasized.