A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFETIlter OzkayaAlessandro Cevreroet al.2017IEEE JSSC
DDR4 transmitter with ac-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS TechnologyMarcel KosselChristian Menolfiet al.2017ESSCIRC 2017
Background calibration using noisy reference ADC for a 12b 600MS/s 2×TI SAR ADC in 14nm CMOS FinFETDanny LuuLukas Kullet al.2017ESSCIRC 2017
A 60 Gb/s 1.9 pJ/bit NRZ optical-receiver with low latency digital CDR in 14nm CMOS FinFETAlessandro CevreroIlter Ozkayaet al.2017VLSI Circuits 2017
A 5Gb/s 7.1fJ/b/mm 8× multi-drop on-chip 10mm data link in 14nm FinFET CMOS SOI at 0.5VElisa SaccoPier Andrea Franceseet al.2017VLSI Circuits 2017
A 12b 61dB SNDR 300MS/s SAR ADC with inverter-based preamplifier and common-mode-regulation DAC in 14nm CMOS FinFETDanny LuuLukas Kullet al.2017VLSI Circuits 2017
A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFETLukas KullDanny Luuet al.2017ISSCC 2017
A 64Gb/s 1.4pJ/b NRZ optical-receiver data-path in 14nm CMOS FinFETAlessandro CevreroIlter Ozkayaet al.2017ISSCC 2017
Modeling and Pareto Optimization of On-Chip Switched Capacitor ConvertersToke M. AndersenFlorian Krismeret al.2017IEEE-TEPL
A 10 W On-Chip Switched Capacitor Voltage Regulator with Feedforward Regulation Capability for Granular Microprocessor Power DeliveryToke M. AndersenFlorian Krismeret al.2017IEEE-TEPL